104 search results - page 3 / 21 » Impact Analysis of Process Variability on Clock Skew |
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ISVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
As integrated circuits are scaled down it becomes difficult to maintain uniformity in process parameters across each individual die. The resulting performance variation requires ...
CF
2008
ACM
14 years 11 months ago
2008
ACM
We develop architectural techniques for mitigating the impact of process variability. Our techniques hide the performance effects of slow components--including registers, function...
ASPDAC
2005
ACM
15 years 3 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
DAC
2007
ACM
15 years 1 months ago
2007
ACM
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated ...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
— This work develops an analytic framework for clock tree analysis considering process variations that is shown to correspond well with Monte Carlo results. The analysis framewor...