104 search results - page 5 / 21 » Impact Analysis of Process Variability on Clock Skew |
DAC
2001
ACM
15 years 10 months ago
2001
ACM
Non-uniform temperature profiles along global interconnect lines in high-performance ICs can significantly impact the performance of these lines. This paper presents a detailed an...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Statistical static timing analysis (SSTA) is emerging as a solution for predicting the timing characteristics of digital circuits under process variability. For computing the stat...
71
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
78
Voted
EDBT
2010
ACM
15 years 23 days ago
2010
ACM
A profound analysis of all relevant business data in the company is necessary for optimizing business processes effectively. Current analyses typically exclusively run on business...
ASPDAC
2009
ACM
15 years 4 months ago
2009
ACM
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...