492 search results - page 61 / 99 » Impact of Limited Memory Resources |
107
Voted
HPCA
2007
IEEE
15 years 6 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
79
Voted
ICMCS
2006
IEEE
15 years 6 months ago
2006
IEEE
In this paper, a high-level optimization methodology is applied for the implementation of the well-known Convolutional Face Finder (CFF) algorithm for real-time applications on ce...
ISLPED
2006
ACM
15 years 6 months ago
2006
ACM
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
108
Voted
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
99
Voted
EUROSYS
2006
ACM
15 years 4 months ago
2006
ACM
This paper presents a connection handoff interface between the operating system and the network interface. Using this interface, the operating system can offload a subset of TCP c...