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» Impact of Parallel Workloads on NoC Architecture Design
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VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
16 years 2 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
WWW
2010
ACM
15 years 9 months ago
Alhambra: a system for creating, enforcing, and testing browser security policies
Alhambra is a browser-based system designed to enforce and test web browser security policies. At the core of Alhambra is a policyenhanced browser supporting fine-grain security ...
Shuo Tang, Chris Grier, Onur Aciiçmez, Samu...
EAGC
2003
Springer
15 years 7 months ago
Automatic Services Discovery, Monitoring and Visualization of Grid Environments: The MapCenter Approach
The complexity of Grid environments is growing as more projects and applications appear in this quick-evolving domain. Widespread applications are distributed over thousands of com...
Franck Bonnassieux, Robert Harakaly, Pascale Prime...
ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
15 years 11 months ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...
ASPLOS
2006
ACM
15 years 8 months ago
Ultra low-cost defect protection for microprocessor pipelines
The sustained push toward smaller and smaller technology sizes has reached a point where device reliability has moved to the forefront of concerns for next-generation designs. Sil...
Smitha Shyam, Kypros Constantinides, Sujay Phadke,...