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» Impact of Technology Scaling in the Clock System Power
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EUC
2004
Springer
15 years 3 months ago
Non-uniform Set-Associative Caches for Power-Aware Embedded Processors
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
Seiichiro Fujii, Toshinori Sato
IPSN
2010
Springer
15 years 4 months ago
High-resolution, low-power time synchronization an oxymoron no more
We present Virtual High-resolution Time (VHT), a powerproportional time-keeping service that offers a baseline power draw of a low-speed clock (e.g. 32 kHz crystal), but provides...
Thomas Schmid, Prabal Dutta, Mani B. Srivastava
VTC
2010
IEEE
134views Communications» more  VTC 2010»
14 years 7 months ago
Sensitivity of Spectrum Sensing Techniques to RF Impairments
Cognitive radios are devices capable of sensing a large range of frequencies in order to detect the presence of primary networks and reuse their bands when they are not occupied. D...
Jonathan Verlant-Chenet, Julien Renard, Jean-Miche...
HIPEAC
2009
Springer
15 years 4 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali
62
Voted
ISLPED
2007
ACM
57views Hardware» more  ISLPED 2007»
14 years 11 months ago
Resource area dilation to reduce power density in throughput servers
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...
Michael D. Powell, T. N. Vijaykumar