419 search results - page 24 / 84 » Impact of Technology Scaling in the Clock System Power |
ICPP
2007
IEEE
15 years 3 months ago
2007
IEEE
Performance and power are critical design constraints in today’s high-end computing systems. Reducing power consumption without impacting system performance is a challenge for t...
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ISLPED
2006
ACM
15 years 3 months ago
2006
ACM
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...
CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
15 years 4 months ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...