419 search results - page 27 / 84 » Impact of Technology Scaling in the Clock System Power |
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
110
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ISCA
2010
IEEE
14 years 8 months ago
2010
IEEE
Virtualization has the potential to dramatically reduce the total cost of ownership of datacenters and increase the flexibility of deployments for general-purpose workloads. If pr...
DSD
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
104
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ISLPED
2004
ACM
15 years 3 months ago
2004
ACM
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...