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» Impact of Technology Scaling in the Clock System Power
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CODES
2005
IEEE
15 years 3 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
ASPLOS
2012
ACM
13 years 5 months ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 3 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
15 years 3 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz
HICSS
2006
IEEE
129views Biometrics» more  HICSS 2006»
15 years 3 months ago
Strategies to Address the Problem of Exiting Expertise in the Electric Power Industry
Retirements, restructuring, and technology changes are producing an accelerating exodus of expertise from the electric power industry. In this paper we review the major approaches...
Dennis Ray, Bill Snyder