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» Impact of Technology Scaling in the Clock System Power
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LCN
2003
IEEE
15 years 2 months ago
Evaluating System Performance in Gigabit Networks
- With the current wide deployment of Gigabit Ethernet technology in the backbone and workgroup switches, the network performance bottleneck has shifted for the first time in nearl...
Khaled Salah, K. El-Badawi
81
Voted
EMSOFT
2006
Springer
15 years 1 months ago
Energy adaptation for multimedia information kiosks
Video kiosks increasingly contain powerful PC-like embedded processors, allowing them to display video at a high level of quality. Such video display, however, entails significant...
Richard Urunuela, Gilles Muller, Julia L. Lawall
79
Voted
GLVLSI
2009
IEEE
112views VLSI» more  GLVLSI 2009»
15 years 4 months ago
The effect of design parameters on single-event upset sensitivity of MOS current mode logic
In this paper, we describe and discuss the effects of design parameters such as transistor size, output voltage swing and bias current on radiation sensitivity of MOS current mode...
Mahta Haghi, Jeff Draper
ICCD
1997
IEEE
90views Hardware» more  ICCD 1997»
15 years 1 months ago
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Ta...
100
Voted
DAC
2008
ACM
14 years 11 months ago
Analog parallelism in ring-based VCOs
The performance advantages in parallel ring-based VCOs are explored. When the number of VCOs is doubled, the parallel VCOs enhance phase noise by 3dB, and the within-chip process-...
Daeik D. Kim, Choongyeun Cho, Jonghae Kim