419 search results - page 49 / 84 » Impact of Technology Scaling in the Clock System Power |
ICPP
2003
IEEE
15 years 2 months ago
2003
IEEE
Multi agent systems, Grid technology, Semantic Web, and Web Intelligence paradigm are three modern approaches in information technologies, which we put together in our research eff...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
FPGA
2010
ACM
14 years 7 months ago
2010
ACM
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
96
Voted
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
JCP
2008
14 years 9 months ago
2008
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...