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» Impact of Technology Scaling in the Clock System Power
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ISLPED
2004
ACM
110views Hardware» more  ISLPED 2004»
15 years 3 months ago
Reducing pipeline energy demands with local DVS and dynamic retiming
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniqu...
Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Au...
79
Voted
SEMWEB
2004
Springer
15 years 3 months ago
Small Can Be Beautiful in the Semantic Web
In 1984, Peter Patel-Schneider published a paper [1] entitled Small can be Beautiful in Knowledge Representation in which he advocated for limiting the expressive power of knowledg...
Marie-Christine Rousset
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
15 years 4 months ago
A Variation Aware High Level Synthesis Framework
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Feng Wang 0004, Guangyu Sun, Yuan Xie
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 3 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
CIKM
1993
Springer
15 years 1 months ago
Collection Oriented Match
match algorithms that can efficiently handleAbstract complex tests in the presence of large amounts of data. Match algorithms that are capable of handling large amounts of On the o...
Anurag Acharya, Milind Tambe