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» Impact of Technology Scaling in the Clock System Power
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83
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ICCD
2008
IEEE
175views Hardware» more  ICCD 2008»
15 years 6 months ago
On-chip high performance signaling using passive compensation
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines(T-lin...
Yulei Zhang, Ling Zhang, Akira Tsuchiya, Masanori ...
79
Voted
ASPDAC
2009
ACM
145views Hardware» more  ASPDAC 2009»
15 years 4 months ago
High performance on-chip differential signaling using passive compensation for global communication
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines is pr...
Ling Zhang, Yulei Zhang, Akira Tsuchiya, Masanori ...
BMCBI
2006
88views more  BMCBI 2006»
14 years 9 months ago
Effect of various normalization methods on Applied Biosystems expression array system data
Background: DNA microarray technology provides a powerful tool for characterizing gene expression on a genome scale. While the technology has been widely used in discovery-based m...
Catalin C. Barbacioru, Yulei Wang, Roger D. Canale...
HPCA
2009
IEEE
15 years 4 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
IMC
2010
ACM
14 years 7 months ago
Scamper: a scalable and extensible packet prober for active measurement of the internet
Large scale active measurement of the Internet requires appropriate software support. The better tools that we have for executing consistent and systematic measurements, the more ...
Matthew J. Luckie