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» Impact of Technology Scaling in the Clock System Power
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DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 4 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
ASPLOS
2006
ACM
15 years 3 months ago
Introspective 3D chips
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
Shashidhar Mysore, Banit Agrawal, Navin Srivastava...
VLSISP
2010
148views more  VLSISP 2010»
14 years 8 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
15 years 3 months ago
An automated design flow for 3D microarchitecture evaluation
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
HIS
2009
14 years 7 months ago
Predistortion in Optical Wireless Transmission Using OFDM
Abstract--The nonlinear characteristic of an LED (light emitting diode) imposes limitations on the performance of indoor optical wireless (OW) systems when using intensity modulati...
Hany Elgala, Raed Mesleh, Harald Haas