119 search results - page 3 / 24 » Impact of Technology Scaling on Digital Subthreshold Circuit... |
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
74
Voted
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Electrothermal couplings between supply voltage, operating frequency, power dissipation and die temperature have been shown to significantly impact the energy-delay-product (EDP) ...
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
— This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay...
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
An accurate and efficient stacking effect macro-model for leakage power in sub-100nm circuits is presented in this paper. Leakage power, including subthreshold leakage power and ga...