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ISCA
2002
IEEE
102views Hardware» more  ISCA 2002»
15 years 5 months ago
Implementing Optimizations at Decode Time
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...
Ilhyun Kim, Mikko H. Lipasti
95
Voted
CORR
2002
Springer
156views Education» more  CORR 2002»
15 years 8 days ago
MPICH-G2: A Grid-Enabled Implementation of the Message Passing Interface
Application development for distributed-computing ``Grids'' can benefit from tools that variously hide or enable application-level management of critical aspects of the ...
Nicholas T. Karonis, Brian R. Toonen, Ian T. Foste...
HOTI
2005
IEEE
15 years 6 months ago
Design and Implementation of a Content-Aware Switch Using a Network Processor
Cluster based server architectures have been widely used as a solution to overloading in web servers because of their cost effectiveness, scalability and reliability. A content aw...
Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. ...
81
Voted
ICIP
2007
IEEE
16 years 2 months ago
DSP Implementation of Deblocking Filter for AVS
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefor...
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
103
Voted
TACAS
2009
Springer
131views Algorithms» more  TACAS 2009»
15 years 7 months ago
Verifying Reference Counting Implementations
Reference counting is a widely-used resource management idiom which maintains a count of references to each resource by incrementing the count upon an acquisition, and decrementing...
Michael Emmi, Ranjit Jhala, Eddie Kohler, Rupak Ma...