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ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
15 years 5 months ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise
SIGCOMM
2012
ACM
13 years 2 months ago
Abstractions for network update
ions for Network Update Mark Reitblatt Cornell Nate Foster Cornell Jennifer Rexford Princeton Cole Schlesinger Princeton David Walker Princeton Configuration changes are a common...
Mark Reitblatt, Nate Foster, Jennifer Rexford, Col...
103
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LCTRTS
2007
Springer
15 years 5 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
IEEEPACT
2007
IEEE
15 years 6 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
AAAI
2006
15 years 1 months ago
Decision Making in Uncertain Real-World Domains Using DT-Golog
DTGolog, a decision-theoretic agent programming language based on the situation calculus, was proposed to ease some of the computational difficulties associated with Markov Decisi...
Mikhail Soutchanski, Huy Pham, John Mylopoulos