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137
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CGO
2006
IEEE
15 years 9 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
189
Voted
TVLSI
2010
14 years 10 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
142
Voted
IPPS
2008
IEEE
15 years 10 months ago
Reducing wasted resources to help achieve green data centers
In this paper we introduce a new approach to the consolidation strategy of a data center that allows an important reduction in the amount of active nodes required to process a het...
Jordi Torres, David Carrera, Kevin Hogan, Ricard G...
116
Voted
EMSOFT
2007
Springer
15 years 9 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou
109
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INEX
2005
Springer
15 years 9 months ago
A Flexible Structured-Based Representation for XML Document Mining
This paper reports on the INRIA group’s approach to XML mining while participating in the INEX XML Mining track 2005. We use a flexible representation of XML documents that allo...
Anne-Marie Vercoustre, Mounir Fegas, Saba Gul, Yve...