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» Implementation of State Elimination Using Heuristics
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67
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CAV
2009
Springer
206views Hardware» more  CAV 2009»
15 years 10 months ago
D-Finder: A Tool for Compositional Deadlock Detection and Verification
D-Finder tool implements a compositional method for the verification of component-based systems described in BIP language encompassing multi-party interaction. For deadlock detecti...
Saddek Bensalem, Marius Bozga, Thanh-Hung Nguyen, ...
ICCAD
2008
IEEE
150views Hardware» more  ICCAD 2008»
15 years 6 months ago
Performance estimation and slack matching for pipelined asynchronous architectures with choice
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
Gennette Gill, Vishal Gupta, Montek Singh
SIAMSC
2010
142views more  SIAMSC 2010»
14 years 4 months ago
Hypergraph-Based Unsymmetric Nested Dissection Ordering for Sparse LU Factorization
In this paper we present HUND, a hypergraph-based unsymmetric nested dissection ordering algorithm for reducing the fill-in incurred during Gaussian elimination. HUND has several i...
Laura Grigori, Erik G. Boman, Simplice Donfack, Ti...
92
Voted
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
15 years 1 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
TPDS
2010
93views more  TPDS 2010»
14 years 8 months ago
Self-Consistent MPI Performance Guidelines
Message passing using the Message Passing Interface (MPI) is at present the most widely adopted framework for programming parallel applications for distributed-memory and clustere...
Jesper Larsson Träff, William D. Gropp, Rajee...