Sciweavers

164 search results - page 10 / 33
» Implementation of a SliM Array Processor
Sort
View
FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
15 years 11 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
ERSA
2010
172views Hardware» more  ERSA 2010»
15 years 3 months ago
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
Heiner Giefers, Marco Platzner
176
Voted
VLDB
2007
ACM
204views Database» more  VLDB 2007»
15 years 11 months ago
Optimization of Frequent Itemset Mining on Multiple-Core Processor
Multi-core processors are proliferated across different domains in recent years. In this paper, we study the performance of frequent pattern mining on a modern multi-core machine....
Eric Li, Li Liu
IPPS
1999
IEEE
15 years 9 months ago
Real-Time Image Processing on a Focal Plane SIMD Array
Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limi...
Antonio Gentile, José Cruz-Rivera, D. Scott...
DELTA
2006
IEEE
15 years 8 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor