13 search results - page 3 / 3 » Implementation of the AES-128 on Virtex-5 FPGAs |
CSREAESA
2008
13 years 7 months ago
2008
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
CHES
2011
Springer
12 years 6 months ago
2011
Springer
Abstract. The paper presents a novel and efficient method to generate true random numbers on FPGAs by inducing metastability in bi-stable circuit elements, e.g. flip-flops. Meta...
FPGA
2010
ACM
13 years 6 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...