Sciweavers

1658 search results - page 210 / 332
» Implementing Bit-addressing with Specialization
Sort
View
HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
15 years 6 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
96
Voted
HPDC
2006
IEEE
15 years 6 months ago
ALPS: An Application-Level Proportional-Share Scheduler
ALPS is a per-application user-level proportional-share scheduler that operates with low overhead and without any special kernel support. ALPS is useful to a range of applications...
Travis Newhouse, Joseph Pasquale
71
Voted
ICMCS
2006
IEEE
129views Multimedia» more  ICMCS 2006»
15 years 6 months ago
Directional Discrete Cosine Transforms for Image Coding
- Nearly all block-based transform schemes for image and video coding developed so far choose the 2-D discrete cosine transform (DCT) of a square block shape. With almost no except...
Bing Zeng, Jingjing Fu
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
15 years 6 months ago
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat...
ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
15 years 6 months ago
Performance improvement of the H.264/AVC deblocking filter using SIMD instructions
The H.264/AVC standard defines an in-loop de- instructions, available in current multimedia SIMD instruction blocking filter which is used in both the encoder and decoder. This set...
Stephen Warrington, Hassan Shojania, Subramania Su...