1528 search results - page 76 / 306 » Implementing Generalized Operator Overloading |
133
Voted
ESA
2006
Springer
15 years 8 months ago
2006
Springer
Lower envelopes are fundamental structures in computational geometry, which have many applications, such as computing general Voronoi diagrams and performing hidden surface removal...
159
Voted
FPGA
2010
ACM
15 years 8 months ago
2010
ACM
Multi-ported memories are challenging to implement with FPGAs since the provided block RAMs typically have only two ports. We present a thorough exploration of the design space of...
122
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FAST
2009
15 years 2 months ago
2009
Over the past five years, large-scale storage installations have required fault-protection beyond RAID-5, leading to a flurry of research on and development of erasure codes for m...
130
Voted
ISCAS
2008
IEEE
15 years 11 months ago
2008
IEEE
— A fully differential translinear 3-phase sinusoidal oscillator architecture is presented. The architecture is meant for BiCMOS implementation and uses only NPN devices, typical...
129
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AES
2000
Springer
15 years 9 months ago
2000
Springer
The National Institute of Standards and Technology (NIST) has announced that one of the design criteria for the Advanced Encryption Standard (AES) algorithm was the ability to eï¬...