Sciweavers

31 search results - page 6 / 7
» Implementing Hybrid Operating Systems with Two-Level Hardwar...
Sort
View
CASES
2000
ACM
13 years 10 months ago
A dynamic memory management unit for embedded real-time system-on-a-chip
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
Mohamed Shalan, Vincent John Mooney III
CASES
2000
ACM
13 years 10 months ago
Flexible instruction processors
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung
CCGRID
2009
IEEE
14 years 1 months ago
Natively Supporting True One-Sided Communication in
As high-end computing systems continue to grow in scale, the performance that applications can achieve on such large scale systems depends heavily on their ability to avoid explic...
Gopalakrishnan Santhanaraman, Pavan Balaji, K. Gop...
COOPIS
2002
IEEE
13 years 11 months ago
Empirical Differences between COTS Middleware Scheduling Strategies
The proportion of complex distributed real-time embedded (DRE) systems made up of commercial-off-the-shelf (COTS) hardware and software is increasing significantly in response to...
Christopher D. Gill, Fred Kuhns, Douglas C. Schmid...
IWMM
2011
Springer
254views Hardware» more  IWMM 2011»
12 years 9 months ago
Short-term memory for self-collecting mutators
We propose a new memory model called short-term memory for managing objects on the heap. In contrast to the traditional persistent memory model for heap management, objects in sho...
Martin Aigner, Andreas Haas, Christoph M. Kirsch, ...