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PC
2010
101views Management» more  PC 2010»
14 years 11 months ago
An efficient parallel implementation of the MSPAI preconditioner
We present an efficient implementation of the Modified SParse Approximate Inverse (MSPAI) preconditioner. MSPAI generalizes the class of preconditioners based on Frobenius norm mi...
Thomas Huckle, A. Kallischko, A. Roy, M. Sedlacek,...
ICA3PP
2005
Springer
15 years 9 months ago
A Practical Comparison of Cluster Operating Systems Implementing Sequential and Transactional Consistency
Shared Memory is an interesting communication paradigm for SMP machines and clusters. Weak consistency models have been proposed to improve efficiency of shared memory applications...
Stefan Frenz, Renaud Lottiaux, Michael Schött...
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 1 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
FPL
1999
Springer
95views Hardware» more  FPL 1999»
15 years 8 months ago
FPGA Viruses
Programmable logic is widely used, for applications ranging from eld-upgradable subsystems to advanced uses such as recon gurable computing platforms which are modi able at run-tim...
Ilija Hadzic, Sanjay Udani, Jonathan M. Smith
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
15 years 8 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...