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» Implementing Image Applications on FPGAs
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CONCURRENCY
2004
151views more  CONCURRENCY 2004»
15 years 4 months ago
User transparency: a fully sequential programming model for efficient data parallel image processing
Although many image processing applications are ideally suited for parallel implementation, most researchers in imaging do not benefit from high performance computing on a daily b...
Frank J. Seinstra, Dennis Koelma
FPL
2011
Springer
203views Hardware» more  FPL 2011»
14 years 4 months ago
Accelerating Fluid Registration Algorithm on Multi-FPGA Platforms
Abstract—In the clinical applications, medical image registrations on the images taken from different times and/or through different modalities are needed in order to have an obj...
Jason Cong, Muhuan Huang, Yi Zou
ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
16 years 1 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
ARCS
2009
Springer
15 years 11 months ago
Ultra-Fast Downloading of Partial Bitstreams through Ethernet
Abstract. In this paper we present a partial bitstreams ultra-fast downloading process through a standard Ethernet network. These Virtex-based and partially reconfigurable systems...
Pierre Bomel, Jeremie Crenne, Linfeng Ye, Jean-Phi...
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
15 years 10 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...