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ASPLOS
2009
ACM
16 years 5 months ago
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
Robert D. Cameron, Dan Lin
HPCA
2007
IEEE
16 years 4 months ago
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-lat...
Stijn Eyerman, Lieven Eeckhout
POPL
2010
ACM
15 years 11 months ago
Ypnos: declarative, parallel structured grid programming
A fully automatic, compiler-driven approach to parallelisation can result in unpredictable time and space costs for compiled code. On the other hand, a fully manual approach to pa...
Dominic A. Orchard, Max Bolingbroke, Alan Mycroft
IISWC
2009
IEEE
15 years 11 months ago
Logicalization of communication traces from parallel execution
—Communication traces are integral to performance modeling and analysis of parallel programs. However, execution on a large number of nodes results in a large trace volume that i...
Qiang Xu, Jaspal Subhlok, Rong Zheng, Sara Voss
ICMT
2009
Springer
15 years 11 months ago
Supporting Parallel Updates with Bidirectional Model Transformations
Abstract. Model-driven software development often involves several related models. When models are updated, the updates need to be propagated across all models to make them consist...
Yingfei Xiong, Hui Song, Zhenjiang Hu, Masato Take...