5562 search results - page 806 / 1113 » Implementing Parallel Cell-DEVS |
193
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IEEEPACT
2007
IEEE
16 years 20 days ago
2007
IEEE
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
169
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ISCAS
2007
IEEE
16 years 19 days ago
2007
IEEE
— A mixed-signal architecture for continuous-time multidimensional model-free optimization is presented. It is based on multi-channel coherent modulation and detection that relia...
122
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ISCAS
2007
IEEE
16 years 19 days ago
2007
IEEE
Abstract— Parallel time-interleaved analog-to-digital converters (TIADCs) are an attractive architecture to realize low-power and high-speed data conversion. As a drawback of suc...
157
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ISCAS
2007
IEEE
16 years 19 days ago
2007
IEEE
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
174
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COCOA
2007
Springer
16 years 16 days ago
2007
Springer
The Two-Sided Crossing Minimization (TSCM) problem calls for minimizing the number of edge crossings of a bipartite graph where the two sets of vertices are drawn on two parallel l...