5562 search results - page 906 / 1113 » Implementing Parallel Cell-DEVS |
147
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ICPP
2002
IEEE
15 years 9 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
140
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VLDB
1987
ACM
15 years 7 months ago
1987
ACM
This paper reports on an implementation of Bayer's Time Interval concurrency control method and compares it to the performance of a conventional timestamp method. The impleme...
174
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BMCBI
2008
15 years 4 months ago
2008
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
140
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ALGORITHMICA
2006
15 years 4 months ago
2006
Our goal is to develop a robust out-of-core sorting program for a distributed-memory cluster. The literature contains two dominant paradigms for out-of-core sorting algorithms: me...
150
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IJHPCA
2010
15 years 2 months ago
2010
As high-end computing systems continue to grow in scale, recent advances in multiand many-core architectures have pushed such growth toward more denser architectures, that is, mor...