In this paper, an efficient design for implementing binary sequence generator on 32-bit instruction execution mode TI TMS320C6416 DSP is presented. The main goal is to achieve high...
This paper proposes an automatic design flow from userfriendly design to efficient implementation of video processing systems. This design flow starts with the use of coarsegrain ...
Providing distributed processes with concurrent objects is a fundamental service that has to be offered by any distributed system. The classical shared read/write register is one ...
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...