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ERSA
2007
174views Hardware» more  ERSA 2007»
15 years 4 months ago
High-Level Specification of Runtime Reconfigurable Designs
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...
Stephen D. Craven, Peter M. Athanas
CADE
2008
Springer
16 years 3 months ago
Celf - A Logical Framework for Deductive and Concurrent Systems (System Description)
CLF (Concurrent LF) [CPWW02a] is a logical framework for specifying and implementing deductive and concurrent systems from areas, such as programming language theory, security prot...
Anders Schack-Nielsen, Carsten Schürmann
HICSS
2002
IEEE
123views Biometrics» more  HICSS 2002»
15 years 8 months ago
On the Performance of a Survivability Architecture for Networked Computing Systems
This research focuses on the performance and timing behavior of a two level survivability architecture. The lower level of the architecture involves attack analysis based on kernel...
William S. Harrison, Axel W. Krings, Nadine Hanebu...
ASPLOS
2004
ACM
15 years 8 months ago
Fingerprinting: bounding soft-error detection latency and bandwidth
Recent studies have suggested that the soft-error rate in microprocessor logic will become a reliability concern by 2010. This paper proposes an efficient error detection techniqu...
Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Baba...
SCIA
2009
Springer
306views Image Analysis» more  SCIA 2009»
16 years 3 months ago
Head Pose Estimation from Passive Stereo Images
We present an algorithm to estimate the 3D pose (location and orientation) of a previously unseen face from low-quality range images. The algorithm generates many pose candidates ...
C. Høilund, J. Jensen, Luc J. Van Gool, Mic...