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DATE
2005
IEEE
103views Hardware» more  DATE 2005»
15 years 9 months ago
Noise Figure Evaluation Using Low Cost BIST
A technique for evaluating noise figure suitable for BIST implementation is described. It is based on a low cost single-bit digitizer, which allows the simultaneous evaluation of ...
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Su...
84
Voted
ISCAS
2005
IEEE
106views Hardware» more  ISCAS 2005»
15 years 9 months ago
A generic multilevel multiplying D/A converter for pipelined ADCs
—State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2n –1) levels. However, the number of levels needed to optimize the performance ...
Vivek Sharma, Un-Ku Moon, Gabor C. Temes
94
Voted
SC
2004
ACM
15 years 9 months ago
Fastpath Optimizations for Cluster Recovery in Shared-Disk Systems
We describe the design and implementation of a clustering service for a high-performance, shared-disk file system. The service provides failure detection and recovery, reliable e...
Randal C. Burns
124
Voted
FCCM
2002
IEEE
109views VLSI» more  FCCM 2002»
15 years 8 months ago
Compiling ATR Probing Codes for Execution on FPGA Hardware
This paper describes the implementation of an automatic target recognition ATR Probing algorithm on a recon gurable system, using the SA-C programming language and optimizing co...
A. P. Wim Böhm, J. Ross Beveridge, Bruce A. D...
140
Voted
DSVIS
2000
Springer
15 years 8 months ago
Specifying Temporal Behaviour in Software Architectures for Groupware Systems
This paper presents an example of how software architectures can encode temporal properties as well as the traditional structural ones. In the context of expressing concurrency con...
Timothy N. Wright, T. C. Nicholas Graham, Tore Urn...