857 search results - page 107 / 172 » Implementing a STARI chip |
121
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ISCAS
2003
IEEE
15 years 10 months ago
2003
IEEE
A compact integrated CMOS circuit for temporal differentiation is presented. It consists of a high-gain inverting amplifier, an active non-linear transconductance and a capacitor...
149
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ISQED
2003
IEEE
15 years 10 months ago
2003
IEEE
This paper addresses a low-cost and real-time solution for the implementation of super-resolution (SR) algorithms over SOC (System-On-Chip) platforms in order to achieve high-qual...
146
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ITC
2003
IEEE
15 years 10 months ago
2003
IEEE
This paper discusses the adoption of Embedded Deterministic Test (EDT) at Infineon Technologies as a means to reduce the cost of manufacturing test without compromising test quali...
145
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MSE
2003
IEEE
15 years 10 months ago
2003
IEEE
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
113
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ISLPED
2003
ACM
15 years 10 months ago
2003
ACM
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...