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» Implementing a STARI chip
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DATE
2010
IEEE
103views Hardware» more  DATE 2010»
15 years 2 months ago
A compact digital amplitude modulator in 90nm CMOS
—This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achie...
V. Chironi, Björn Debaillie, Andrea Baschirot...
ASAP
2002
IEEE
103views Hardware» more  ASAP 2002»
15 years 2 months ago
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
Neil Burgess
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 2 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
ISLPED
2000
ACM
99views Hardware» more  ISLPED 2000»
15 years 2 months ago
Practical considerations of clock-powered logic
Recovering and reusing circuit energies that would otherwise be dissipated as heat can reduce the power dissipated by a VLSI chip. To accomplish this requires a power source that ...
William C. Athas
CHES
2000
Springer
135views Cryptology» more  CHES 2000»
15 years 2 months ago
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
Power analysis is a very successful cryptanalytic technique which extracts secret information from smart cards by analysing the power consumed during the execution of their interna...
Adi Shamir