857 search results - page 156 / 172 » Implementing a STARI chip |
DAC
2000
ACM
15 years 10 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
78
Voted
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
61
Voted
SPAA
2009
ACM
15 years 10 months ago
2009
ACM
We present three new reader-writer lock algorithms that scale under high read-only contention. Many previous reader-writer locks suffer significant degradation when many readers a...