857 search results - page 18 / 172 » Implementing a STARI chip |
74
Voted
ASPDAC
2007
ACM
15 years 5 months ago
2007
ACM
Abstract-- A complementary ferroelectriccapacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the ...
116
Voted
AUSAI
2006
Springer
15 years 5 months ago
2006
Springer
Abstract. In order to apply nonmonotonic logics for specifying industrial automation controllers, we define (1) a method to extend atemporal nonmonotonic logics with temporal opera...
134
Voted
FCCM
2004
IEEE
15 years 5 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
148
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BMCBI
2010
15 years 2 months ago
2010
Background: RNA structure prediction problem is a computationally complex task, especially with pseudo-knots. The problem is well-studied in existing literature and predominantly ...
128
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DDECS
2008
IEEE
15 years 3 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...