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» Implementing a STARI chip
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DRMTICS
2005
Springer
15 years 3 months ago
A Vector Approach to Cryptography Implementation
The current deployment of Digital Right Management (DRM) schemes to distribute protected contents and rights is leading the way to massive use of sophisticated embedded cryptograph...
Jacques J. A. Fournier, Simon W. Moore
DFT
2003
IEEE
120views VLSI» more  DFT 2003»
15 years 3 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
VLSID
2000
IEEE
164views VLSI» more  VLSID 2000»
15 years 2 months ago
A Fast Algorithm for Computing the Euler Number of an Image and its VLSI Implementation
Digital images are convenient media for describing and storing spatial, temporal, spectral, and physical components of information contained in a variety of domains(e.g. aerial/sa...
Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kum...
IPPS
1999
IEEE
15 years 2 months ago
FPGA Implementation of Modular Exponentiation
An e cient implementations of the main building block in the RSA cryptographic scheme is achieved by mapping a bit-level systolic array for modular exponentiation onto Xilinx FPGAs...
Alexander Tiountchik, Elena Trichina
CODES
2004
IEEE
15 years 1 months ago
A novel deadlock avoidance algorithm and its hardware implementation
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
Jaehwan Lee, Vincent John Mooney III