857 search results - page 80 / 172 » Implementing a STARI chip |
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
108
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ASPDAC
1999
ACM
15 years 2 months ago
1999
ACM
This paper presents a performance-driven I/O pin routing algorithm with special consideration of wire uniformity. First, a topological routing based on min-cost max-flow algorith...
100
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FPGA
1998
ACM
15 years 2 months ago
1998
ACM
It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
When an application or external environmental conditions cause a chip's cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power densit...
DAC
1995
ACM
15 years 1 months ago
1995
ACM
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...