857 search results - page 91 / 172 » Implementing a STARI chip |
DSD
2010
IEEE
14 years 10 months ago
2010
IEEE
—Several alternatives of mesh-type topologies have been published for the use in Networks-on-Chip. Due to their regularity, mesh-type topologies often serve as a foundation to in...
CORR
2010
Springer
14 years 10 months ago
2010
Springer
Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functio...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
102
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DAC
2003
ACM
15 years 10 months ago
2003
ACM
A low power wireless intercom system is designed and implemented. Two fully-operational ASICs, integrating custom and commercial IP, implement the entire digital portion of the pr...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
—We describe a spiking neuronal network which allows local synaptic weights to be assigned to individual synapses. In previous implementations of neuronal networks, the biases th...