857 search results - page 92 / 172 » Implementing a STARI chip |
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— The rapid control of sonar-guided vehicles through obstacle fields has been a goal of robotics for decades. How sensory data is represented strongly affects how obstacles and g...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to con...
FPGA
2005
ACM
15 years 3 months ago
2005
ACM
We introduce a 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algor...
EH
2003
IEEE
15 years 3 months ago
2003
IEEE
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...
CODES
1996
IEEE
15 years 2 months ago
1996
IEEE
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...