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DAC
2002
ACM
16 years 4 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
DAC
2003
ACM
16 years 4 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
ICML
2005
IEEE
16 years 4 months ago
Learning first-order probabilistic models with combining rules
Many real-world domains exhibit rich relational structure and stochasticity and motivate the development of models that combine predicate logic with probabilities. These models de...
Sriraam Natarajan, Prasad Tadepalli, Eric Altendor...
136
Voted
ICSE
2008
IEEE-ACM
16 years 4 months ago
Scalable detection of semantic clones
Several techniques have been developed for identifying similar code fragments in programs. These similar fragments, referred to as code clones, can be used to identify redundant c...
Mark Gabel, Lingxiao Jiang, Zhendong Su
135
Voted
ICSE
2008
IEEE-ACM
16 years 4 months ago
Symbolic mining of temporal specifications
Program specifications are important in many phases of the software development process, but they are often omitted or incomplete. An important class of specifications takes the f...
Mark Gabel, Zhendong Su
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