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CODES
2008
IEEE
15 years 6 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov
SOSP
1993
ACM
15 years 1 months ago
Protection Traps and Alternatives for Memory Management of an Object-Oriented Language
Many operating systems allow user programs to specify the protectionlevel (inaccessible, read-only, read-write) of pages in their virtual memory address space, and to handle any p...
Antony L. Hosking, J. Eliot B. Moss
ISCA
1995
IEEE
147views Hardware» more  ISCA 1995»
15 years 3 months ago
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
Alvin R. Lebeck, David A. Wood
ISCA
1996
IEEE
124views Hardware» more  ISCA 1996»
15 years 4 months ago
MGS: A Multigrain Shared Memory System
Parallel workstations, each comprising 10-100 processors, promise cost-effective general-purpose multiprocessing. This paper explores the coupling of such small- to medium-scale s...
Donald Yeung, John Kubiatowicz, Anant Agarwal
PPOPP
2012
ACM
13 years 7 months ago
A speculation-friendly binary search tree
We introduce the first binary search tree algorithm designed for speculative executions. Prior to this work, tree structures were mainly designed for their pessimistic (non-specu...
Tyler Crain, Vincent Gramoli, Michel Raynal