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CODES
2007
IEEE
16 years 23 days ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
HIPC
2007
Springer
16 years 17 days ago
Molecular Dynamics Simulations on Commodity GPUs with CUDA
Molecular dynamics simulations are a common and often repeated task in molecular biology. The need for speeding up this treatment comes from the requirement for large system simula...
Weiguo Liu, Bertil Schmidt, Gerrit Voss, Wolfgang ...
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ACSAC
2006
IEEE
16 years 15 days ago
From Languages to Systems: Understanding Practical Application Development in Security-typed Languages
Security-typed languages are an evolving tool for implementing systems with provable security guarantees. However, to date, these tools have only been used to build simple “toyâ...
Boniface Hicks, Kiyan Ahmadizadeh, Patrick Drew Mc...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
16 years 14 days ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...
GLOBECOM
2006
IEEE
16 years 14 days ago
Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation
Abstract−Several high performance LDPC codes have paritycheck matrices composed of permutation submatrices. We design a parallel-serial architecture to map the decoder of any str...
Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Ven...