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ESANN
2006
15 years 26 days ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
93
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FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 4 months ago
Matching and searching analysis for parallel hardware implementation on FPGAs
Matching and searching computations play an important role in the indexing of data. These computations are typically encoded in very tight loops with a single index variable and a...
Pablo Moisset, Pedro C. Diniz, Joonseok Park
IE
2007
15 years 1 months ago
Implementation and evaluation of a background music reactive game
This paper discusses further work on the authors’ “background music reactive games” concept, where background music is used to modify video game parameters and thus actions ...
Khalid Aallouche, Homam Albeiriss, Redouane Zargho...
ERSA
2008
92views Hardware» more  ERSA 2008»
15 years 27 days ago
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
Hasitha Muthumala Waidyasooriya, Masanori Hariyama...
IWACA
1994
126views Multimedia» more  IWACA 1994»
15 years 3 months ago
An Object-Oriented Implementation of the Xpress Transfer Protocol
Abstract. Object-oriented design principles map well onto protocol implementations because protocols essentially manipulate two structures--packets and the states of the endpoints....
W. Timothy Strayer, Simon Gray, Raymond E. Cline J...