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» Implementing the Best Processor Cores
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DEEC
2007
IEEE
15 years 6 months ago
BestChoice SRM: a simple and practical supplier relationship management system for e-procurement
Supplier relationship management (SRM) is an important contributor to a company’s efficiency and credibility. Although several ways are used to provide SRM functionality, these a...
Dongjoo Lee, Seungseok Kang, Sangkeun Lee, Young-g...
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
15 years 5 months ago
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder
In this paper, we propose an optimized real-time MPEG-2 video decoder. The decoder has been implemented in one FPGA device as a HW/SW partitioned system. We made time/power-consum...
Matjaz Verderber, Andrej Zemva, Damjan Lampret
ASPLOS
2011
ACM
14 years 3 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
IEEEPACT
2005
IEEE
15 years 5 months ago
Maximizing CMP Throughput with Mediocre Cores
In this paper we compare the performance of area equivalent small, medium, and large-scale multithreaded chip multiprocessors (CMTs) using throughput-oriented applications. We use...
John D. Davis, James Laudon, Kunle Olukotun
FPL
2001
Springer
77views Hardware» more  FPL 2001»
15 years 4 months ago
Implementation of (Normalised) RLS Lattice on Virtex
We present an implementation of a complete RLS Lattice and Normalised RLS Lattice cores for Virtex. The cores accept 24-bit fixed point inputs and produce 24-bit fixed point predic...
Felix Albu, Jiri Kadlec, Christopher I. Softley, R...