581 search results - page 23 / 117 » Implementing the Best Processor Cores |
CC
2007
Springer
15 years 6 months ago
2007
Springer
To achieve high resource utilization for multi-issue Digital Signal Processors (DSPs), production compilers commonly include variants of the iterative modulo scheduling algorithm. ...
ASPLOS
2008
ACM
15 years 1 months ago
2008
ACM
In this paper we propose the Merge framework, a general purpose programming model for heterogeneous multi-core systems. The Merge framework replaces current ad hoc approaches to p...
CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
ICIP
2005
IEEE
16 years 1 months ago
2005
IEEE
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
ICAS
2008
IEEE
15 years 6 months ago
2008
IEEE
—Based on insights from the implementation of commercial products for data-centre resource management, we identified key challenges in the development of cost-effective autonomi...