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138
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SIAMCOMP
2000
15 years 1 months ago
2000
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
—Dynamic Thermal Management techniques have been widely accepted as a thermal solution for their low cost and simplicity. The techniques have been used to manage the heat dissipa...
113
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IPPS
2006
IEEE
15 years 7 months ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
108
Voted
ASYNC
2002
IEEE
15 years 6 months ago
2002
IEEE
For application in a software defined radio a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages...
107
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CISS
2011
IEEE
14 years 5 months ago
2011
IEEE
— We present a hardware-accelerated implementation of a bottom-up visual attention algorithm. This algorithm generates a multi-scale saliency map from differences in image intens...