581 search results - page 3 / 117 » Implementing the Best Processor Cores |
FPL
2007
Springer
15 years 3 months ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
HIPEAC
2007
Springer
15 years 3 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
FPL
2010
Springer
14 years 7 months ago
2010
Springer
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—In this paper, we propose a scalable and transparent parallelization scheme using threads for multi-core processor. The performance achieved by our scheme is scalable to the num...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract: Existing multicore systems already provide deep levels of thread parallelism. Hybrid programming models and composability of parallel libraries are very active areas of r...