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» Implementing the Best Processor Cores
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VEE
2010
ACM
327views Virtualization» more  VEE 2010»
15 years 4 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
IPPS
2005
IEEE
15 years 3 months ago
Experiences with Soft-Core Processor Design
Soft-core processors exploit the flexibility of Field Programmable Gate Arrays (FPGAs) to allow a system designer to customize the processor to the needs of a target application....
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Ste...
79
Voted
IPCCC
2007
IEEE
15 years 3 months ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
PPL
2008
117views more  PPL 2008»
14 years 9 months ago
Operating Systems in silicon and the Dynamic Management of Resources in Many-Core Chips
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
Chris R. Jesshope
DATE
2002
IEEE
108views Hardware» more  DATE 2002»
15 years 2 months ago
Networks on Silicon: Combining Best-Effort and Guaranteed Services
We advocate a network on silicon (NOS) as a hardware architecture to implement communication between IP cores in future technologies, and as a software model in the form of a prot...
Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeter...