We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pega...