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» Implementing the Best Processor Cores
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FPL
2009
Springer
161views Hardware» more  FPL 2009»
15 years 6 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
143
Voted
CARDIS
2000
Springer
124views Hardware» more  CARDIS 2000»
15 years 6 months ago
Elliptic Curve Cryptography on Smart Cards without Coprocessors
Abstract This contribution describes how an elliptic curve cryptosystem can be implemented on very low cost microprocessors with reasonable performance. We focus in this paper on t...
Adam D. Woodbury, Daniel V. Bailey, Christof Paar
115
Voted
PLDI
2010
ACM
15 years 5 months ago
Composing Parallel Software Efficiently with Lithe
Applications composed of multiple parallel libraries perform poorly when those libraries interfere with one another by obliviously using the same physical cores, leading to destru...
Heidi Pan, Benjamin Hindman, Krste Asanovic
EUROPAR
2010
Springer
15 years 2 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
IJHPCA
2010
105views more  IJHPCA 2010»
15 years 10 days ago
The Importance of Non-Data-Communication Overheads in MPI
With processor speeds no longer doubling every 18-24 months owing to the exponential increase in power consumption and heat dissipation, modern HEC systems tend to rely lesser on ...
Pavan Balaji, Anthony Chan, William Gropp, Rajeev ...